555 Timer IC | Monostable Mode

Monostable Mode of 555 Timer IC is discussed in this post. This is the part 3 of the series on 555 Timer IC. Part 1 discusses the pin configuration and working of the internal circuit of 555 Timer IC so you might want to have a look at it if you haven’t read it already: 555 Timer IC - Introduction. 

Introduction to Monostable Mode:

555 IC in its Monostable mode, also known as a monostable multivibrator has one stable state in which it can remain indefinitely. When a trigger pulse is applied to this monostable multivibrator, it switches to another quasi-stable state for a given time interval (let say T) and then reverts back to the original stable state. As it switches to the quasi-stable state once, for a single input trigger pulse, this circuit is also known as One-Shot. The duration ‘T’ for which the one-shot remains in the quasi-stable state is independent of the triggering pulse and can be adjusted using other parameters as we will see in the discussion below. This mode of 555 is generally used as a pulse-standardizer.

Circuit Diagram:

The circuit diagram below shows the connection of 555 in Monostable mode. This is a simple circuit which requires a 555 IC, a resistor and a capacitor. 

Circuit diagram of 555 in monostable mode

Working:

Now, let us look at the working of 555 IC in monostable mode. The flip-flop inside the 555 is in the reset state when the circuit is in the stable state. So, the output of the IC is LOW and the Q1 transistor is in saturation connecting the capacitor to ground, thus the capacitor is discharged initially (see the figure below for a better understanding). Now, if we keep the trigger pin HIGH, the input to comparator 1 and 2 will be LOW and the flip-flop will go into the memory state, keeping the circuit in this state forever. Thus, the trigger input is HIGH and the output is LOW in the stable state.

A negative input pulse is applied to the pin 2 of 555 to trigger it. The output of comparator 2 will be HIGH and that of comparator 1 will be still LOW. So the output of 555 will switch to HIGH, Q1 goes to cut off. Therefore the capacitor C starts charging through resistor R with a time constant T = R*C. Once the trigger pulse switches to HIGH again, the output of comparator 2 goes back to 0 and that of comparator 1 is still 0. So the output remains in the previous state and C still charges.

 As the voltage across capacitor crosses (2*VCC)/3, the output of comparator 1 switches to logic HIGH and that of comparator 2 still remains LOW. So 555's output is pulled to logic LOW and Q1 transistor comes back to saturation as it was initially and capacitor starts to discharge rapidly through transistor Q1. Now the voltage across the capacitor and trigger pulse both are same as they were initially. So the output remains in the same stable state until another trigger pulse is applied.

Thus, 555 produce an output pulse of a fixed duration ‘T’ which is very important to us as it characterizes a monostable multivibrator. we will now calculate ‘T’. 

Simulation of the output of the circuit given in the section on circuit diagram

Time Period:

If we notice in the graph of V_C above, we can see that the output pulse remains HIGH as long as the capacitor ‘C’ charges from zero volts to (2*VCC)/3. So, we can find the time T if we calculate the time it takes for C to charge from 0 to (2*VCC)/3. The capacitor charges with a time constant R*C, so its equation can be given by this equation below.

At, time T, voltage across the capacitor becomes 2*VCC/3, so we get,

So, depending on the pulse duration we require, we can choose for the corresponding values of R and C from the above equation. This completes our analysis of 555 Timer IC in Monostable mode. I hope you find this tutorial useful. Comment your opinions and topics you want me to discuss in future.

Thanks for reading!

555 Timer IC | Astable Mode

Astable Mode of 555 Timer IC is discussed in this post. This is the part 2 of the series on 555 Timer IC. Part 1 discusses the pin configuration and working of the internal circuit of 555 Timer IC, so might want to have a look at it, if you haven’t read it already: 555 Timer IC - Introduction. 

Introduction to Astable Mode:

555 IC oscillates continuously between HIGH and LOW, generating pulses of a particular frequency at the output, in its astable mode. The frequency, at which the 555 oscillates, is controlled by adjusting the values of resistors and capacitor used to implement the circuit. This is the most popular mode of operation of 555 Timer. This mode can be used to generate clock signals, also the output frequency when connected to a speaker can produce sound.

Circuit Diagram:

The circuit diagram below shows the connection of 555 in astable mode. How does this circuit work? How to decide on the value of resistors (R_A and R_B) and capacitor (C)? What is the Time period of the pulse generated at the output? What is its Duty cycle? All these questions will be answered in this post.

Fig 1: (a) 555 connected in Astable Mode, (b) Output voltage at pin 3 of the 555. 

Working:

Assume that the capacitor ‘C’ is completely discharged initially. Therefore, the voltage at pin 2 and 6 or node ‘V_C’ is 0 at time t=0. Since, V_C = 0, this is same as case 2 from the previous post. So, the output of comparator 1 is ‘0’, comparator 2 is ‘1’. The output of 555 (V_O) is ‘1’ and the Q1 transistor is cut-off. So, the capacitor C starts to charge through R_A and R_B to VCC. As the voltage V_C increases above VCC/3, the circuit keeps working as above, because, for the voltage of pin 2 and 6 between VCC/3 and 2*VCC/3, 555 is in memory state as described by case 3 of the previous post. C charges further until it crosses 2*VCC/3.

Once the voltage V_C crosses 2*VCC/3, the output of comparator 1 goes ‘1’, comparator 2 switches to ‘0’, hence the output switches to ‘0’ and Q1 is in saturation as in case 1 of the previous post. Now, as Q1 is in saturation, pin 7 can be assumed to be connected to ground, thus the capacitor C which is charged to 2*VCC/3 begins to discharge through the resistor R_B.

As V_C decreases and falls below VCC/3, 555 IC switches itself again to the state it was initially in and the process repeats itself. This cycle of charging and discharging of the capacitor keeps on repeating itself until the power supply is disconnected, thus causing the output of 555 Timer IC to oscillate. Since we have seen the working of this circuit, next we discuss how to find time period the pulse generated.

Graph of the Vc vs time and corresponding Vo vs time for the circuit shown in Fig 1.  

Time Period:

If you notice in the graph of V_O, the HIGH time of the first cycle (T_H1) is greater than the HIGH time of remaining pulses (T_H). This is known as first cycle timing error. We can ignore this error most of the times because we can use the 555 from its second cycle.

To find the HIGH time (T_H) of the pulse, we look at the corresponding curve of V_C. C is charging through R_A and R_B from VCC/3 to VCC. Therefore, the time constant of charging becomes C*(R_A + R_B) and for charging the equation of V_C(t) becomes as the first equation in the following figure. Capacitor charges to 2*VCC/3 after T_H time has passed. Put this in the equation to get the second equation and hence HIGH time.  

Similarly, to find the LOW time (T_L) of the pulse, we look at the corresponding curve of V_C. C is discharging through RB from 2*VCC/3 to ground. Therefore, the time constant of discharging becomes C*R_B and for discharging the equation of V_C(t) becomes as the first equation in the following figure. The capacitor discharges to VCC/3 after T_L time has passed. Put this in the equation to get the second equation and hence LOW time.  

555 oscillates continuously between HIGH and LOW in astable mode. So, the time period (T) of a single pulse is given by the sum of HIGH and LOW time.

T = T_H + T_L = C.(R_A + 2.R_B).ln2.

From this equation, if we know the values of resistors and capacitor, we can find the time period and hence the frequency of oscillations (f = 1/T). or if we want to fix our frequency, we can choose the values of resistors and capacitor correspondingly.

Duty Cycle:

Since we get rectangular pulses at the output, it is useful to know the duty cycle of the pulse. Duty cycle is defined as the time for which a pulse remains HIGH in its time period. Therefore we get,

Notice from the equation of duty cycle, that this circuit can never produce a square pulse, i.e. 50% duty cycle.

This completes our analysis of 555 Timer IC in Astable mode. I will cover 555’s Monostable mode in my next tutorial. I hope you find this tutorial useful. Comment your opinions and topics you want me to discuss in future.

Thanks for reading!

555 Timer IC | Introduction

In this post, 555 Timer Integrated Circuit(IC) is introduced. The working of its internal circuit, it’s modes of operation and pinout are discussed.

Introduction:

555 timer IC is the most popular IC ever manufactured. It was introduced in 1972 by Signetics Corporation. It's a highly stable device for generation of accurate time delays and oscillation. Some of its major applications include precision timing, pulse generation, time delay generation, pulse width modulation(PWM).

Usually, 555 is operated in one of the two modes, astable or monostable:

·         Astable Mode: IC’s output oscillates continuously between the two stable states, HIGH and LOW, thus producing clock-like pulses at the output.

·         Monostable Mode/ One-Shot: corresponding to a trigger pulse as input, a pulse of a particular duration is generated. Usually used to create time delays.

Pinout:

This IC has 8 pins.The following figure shows the pin configuration of 555 Timer IC:

Internal circuit:

Internally 555 IC is made up of many transistors. But trying to understand it's working on transistor level can be difficult so we will look at the block diagram representation of the internal circuit, which is as shown in the figure below.

Here we have three resistors of value 5KOhm each connected in series between VCC and Ground such that they set voltage references of 2*VCC/3 and VCC/3 for the input of op-amps. Outputs of these op-amps are connected to the RS flip-flop and output is taken from the flip-flop with an output stage in between.

Pin Functions:

·         Pin1- Ground: Connects 555 IC to ground reference voltage.

·         Pin 2- Trigger: Connected internally to the negative input terminal of op-amp2. If the voltage at this pin drops below VCC/3, the internal flip-flop gets 'set' and switches the output at pin 3 from 'LOW' to 'HIGH.'

·         Pin 3- Output: pin from which the output of 555 is taken.

·         Pin 4-Reset: Apply Negative pulse to this pin, to disable or reset the IC. When not used for reset purposes, it should be connected to VCC to avoid false triggering.

·         pin 5- Control: An external voltage applied to this pin can be used to modulate the output voltage. When not in use, connect this pin to ground with a 0.01uF capacitor in between to eliminate any possible noise.

·         pin 6- Threshold: Connected internally to the positive input terminal of op-amp1. If the voltage at this pin rises above 2*VCC/3, the internal flip-flop gets 'reset' and switches the output at pin 3 from 'HIGH' to 'LOW'.

·         Pin 7- Discharge: connected directly to the Collector of an internal NPN transistor 'Q1', which is used to 'discharge' the timing capacitor to ground, when the output at pin 3 is 'LOW'.

·         Pin 8- VCC: Connects IC to the supply voltage with respect to ground.

Working:

Threshold and Trigger pins are generally used to give input to our IC. So, the working of 555 IC can be best explained by considering different voltages at these pins. Three cases are possible for the input voltages and are discussed below. Let pin 5 is connected to 0.01uF capacitor and then to ground, pin 4 and pin 8 are connected to VCC. Let's start the analysis:

Case1: Threshold voltage > 2*VCC/3 and Trigger voltage > VCC/3.

Then the output of op-amp1 is HIGH and that of op-amp2 is LOW. Input R and S to the RS flip-flop are logic '1' and '0', so the output of the flip-flop and also 555 IC is 'LOW'. Also, Q1 transistor's base is at logic 'HIGH', there is a short circuit(very low resistance as Q1 is in saturation) between pin 7 and ground.

Case2: Threshold voltage < 2*VCC/3 and Trigger voltage < VCC/3.

Then the output of op-amp1 is LOW and that of op-amp2 is HIGH. Input R and S to the RS flip-flop are logic '0' and '1', so the output of the flip-flop and also 555 IC is 'HIGH'. Also, Q1 transistor's base is at logic 'LOW', there is an open circuit(very high resistance as Q1 is in the cut-off state) between pin 7 and ground.

Case 3: Threshold voltage < 2*VCC/3 and Trigger voltage > VCC/3.

Then the output of op-amp1 is LOW and that of op-amp2 is also LOW. Input R and S to the RS flip-flop are logic '0' and '0', so the flip-flop goes into the memory state, i.e. it remains same as it's previous state.

These three cases are utilized by the 555 circuits to operate in various modes. We will look at how 555 works in the Astable and Monostable mode in my next posts.

Conclusion:

I hope you find this tutorial useful. comment your opinions and topics you want me to discuss in future.

Thanks for reading!